a) Assume that the MIPS registers $2, $3 together contain one 64-bit integer and registers $4, $5 together contain another 64-bit integer. The even numbered register holds the high 32 bits and the odd numbered register holds the low 32 bits. Show a series of MIPS true-op instructions that produce in the register pair $6, $7 the 64-bit double precision integer sum of these two 64-bit integers.
b) Show a pair of (i.e., two) ARM instructions that place into the register pair R6, R7 the 64-bit integer sum of the two 64-bit integers in the register pair R2, R3 plus the 64-bit integer in the register pair R4, R5.